About

Krynen Technology is the personal website of an engineer named Kees Krijnen about ideas, views, vision and proposals regarding hardware systems, software systems or combination, presented in open source hardware and software projects:

SR2CB

The Synchronous Redundant Ring Channel Bus (S-R-square-C-Bus) is a data bus with a open ring topology where a data channel is constructed from successive frames fixed bit/bits/byte/word/dword/qword/etc. positions. The SR2CB network protocol supports synchronous operation by means of a distributed clock mechanism. Each ring node has two full duplex (TX/RX) hardware ports.

The physical interface (layer) between SR2CB nodes is based on 1000BASE-T, 100BASE-TX, RS-485 or LVDS. 1000BASE-T and 100BASE-TX PHYs are also common for the ethernet network physical layer but not bound to transmit solely ethernet frames. The SR2CB frames are continuously transmitted by the ring nodes clockwise and counterclockwise. Slave nodes retransmit those SR2CB frames after receipt and insert or extract channel data 'on the fly'. Within a SR2CB master/slave ring the single master node starts the redundant ring initialization and transmits the SR2CB frames. Master nodes do not pass SR2CB frames around except for a broken redundant ring (single point of failure) or when the redundant ring is exclusively build from master nodes.

SONEO

SONEO is an SR2CB application for digital audio distribution, e.g. public address, congress, intercom or stage performances. NEO is pronounced like the main character name Neo from the SciFi movie the Matrix. A data transmission rate of 20k SR2CB frames per second gives a byte channel speed of 160kb/s (20k times 8 bits) and offers 608 byte channels for 100BASE-TX and 6233 byte channels for 1000BASE-T PHYs. The 160kb/s is high enough for good audio quality APCM (32kHz voice - low latency - described in the Bluetooth A2DP specification) and Opus (48kHz voice and music) codecs - if required AES encrypted and authenticated. Multiple byte channels can be combined to distribute 48kHz companding or uncompressed audio.

SF programming language

SF is an object oriented generic programming or hardware definition language for embedded purposes. The name SF was originally meant as an acronym for Structured Forth, but the SF syntax has no resemblance with the Forth programming language syntax and the name is just SF now without hinting to Forth. The SF compiler will be supported by an IDE named Prime which includes a code/design browser, simulator and (target) debugger. The 'structure' in the SF former name Structured Forth did not imply that Forth has no structure or does not offer structure but that the SF source code layout is strict (like coding standard rules) to improve readability and more modularity and clarity is offered by data structures, strong typing and object oriented techniques.

Forth is a member of the class of extensible - no distinction between core words and created routines - interactive languages. A Forth compiler-interpreter can be seen as an extensible full macro-assembler and integrated operating system for an abstract stack processor (virtual machine). Forth's postfix notation and its inner construction allows very compact refactored code providing a terminal, an editor, a compiler and an interpreter within 16KB of code for a general 8-bit processor like the Z80 or 6502. The low memory requirement and the interactive debugging feature were a great advantage in the beginning years of programming microprocessors.

SF is intended as a very readable object oriented generic programming or hardware definition language while keeping the unique features from Forth as much as possible. The inner works of SF are still very Forth-like. Infix statements and function calls are translated to postfix statements before being processed. The SF cross-compiler generates as a programming language depending on target system requirements - speed vs code size - native, indirect or token threaded code for a (simulated) micro or soft core processor. As a hardware definition language (HDL) the compiler generates EDIF for programmable logic e.g. an FPGA. A subset of the SF language is supported for HDL synthesis.

The SF cross-compiler is an incremental compiler evaluating all source code (global analysis) used as input for complete - all - target code generation. There are no forward reference declarations required. The SF compiler keeps track of all references (in-memory indexes) by means of a low level database (no query language) also written to disk as a repository for rebuilds, dynamic loading and debugging.